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STM32F217VG 数据表(PDF) 76 Page - STMicroelectronics |
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STM32F217VG 数据表(HTML) 76 Page - STMicroelectronics |
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76 / 175 page ![]() Electrical characteristics STM32F21xxx 76/175 DocID17050 Rev 9 Table 20. Typical and maximum current consumption in Run mode, code with data processing running from Flash memory (ART accelerator disabled) Symbol Parameter Conditions fHCLK Typ Max(1) Unit TA = 25 °C TA = 85 °C TA = 105 °C IDD Supply current in Run mode External clock(2), all peripherals enabled(3) 120 MHz 61 81 93 mA 90 MHz 48 68 80 60 MHz 33 53 65 30 MHz 18 38 50 25 MHz 14 34 46 16 MHz(4) 10 30 42 8 MHz 6 26 38 4 MHz 4 24 36 2 MHz 3 23 35 External clock(2), all peripherals disabled 120 MHz 33 54 66 90 MHz 27 47 59 60 MHz 19 39 51 30 MHz 11 31 43 25 MHz 8 28 41 16 MHz(4) 626 38 8 MHz 4 24 36 4 MHz 3 23 35 2 MHz 2 23 34 1. Based on characterization, tested in production at VDD max and fHCLK max with peripherals enabled. 2. External clock is 4 MHz and PLL is on when fHCLK > 25 MHz. 3. When the ADC is on (ADON bit set in the ADC_CR2 register), add an additional power consumption of 1.6 mA per ADC for the analog part. 4. In this case HCLK = system clock/2. |
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