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MAS281 数据表(PDF) 19 Page - Dynex Semiconductor |
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MAS281 数据表(HTML) 19 Page - Dynex Semiconductor |
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19 / 55 page ![]() MAS281 19/55 extended 8-bit displacement field within the instruction. This sum then points to the memory address to which control will be transferred if the branch is taken. 4.2.7 BASE RELATIVE (B) There are two formats which implement Base Relative Addressing; one allows indexing and one does not. For the non-indexable form, the contents of the instruction specified base register (BR = BR’ + 12) is added to the 8-bit displacement field (DU) of the 16-bit instruction. For the indexable form, the sum of the contents of a specified index register and a specified base register is the address of the required operand. Registers R1 through R15 may be specified for indexing. Registers R12 through R15 may be specified as the base register. 4.2.8 SPECIAL This addressing mode is applicable to instructions that do not follow the above formats. The instructions that use this special mode are indicated in Table 7a. 4.3 BENCHMARKING Table 7a defines the number and type of machine cycles associated with each MIL-STD-1750A instruction. This information may be used when benchmarking MAS281 performance. The Digital Avionics Instruction Set (DAIS) mix, which defines a typical frequency of occurrence for MIL-STD- 1750A instructions, is used here for this purpose. One problem with the DAIS mix, however, is that it does not reflect the impact of data dependencies on system performance. For example, a multiplication in which an operand is zero may be performed much faster than one with two non-zero operands. Also, the DAIS mix does not specify such time consuming operations as normalization and alignment. Realistic benchmarks must therefore take both the instruction mix and data dependencies into account. To this end, machine cycle counts in Table 7a which have data dependencies, are annotated with either an "a" or "wa"suffix. An "a" suffix reflects an average number of machine cycles (where each of several possibilities is equally likely) and a “"wa" suffix reflects a weighted average number of machine cycles (where some data possibilities are more likely than others). Weighted averages are only applicable to floating-point operations. Weighted averages provided in Table 7a are based on the Sweeney (IBM) guidelines. These guidelines take a wide range of data dependencies into consideration. Normalization and alignment operations are also represented. Table 6 defines MAS281 throughput, at various frequencies and wait states, for the DAIS mix using Sweeney data dependencies. It should be noted that using the Sweeney guidelines is a conservative approach to benchmarking. If best case assumptions are made and such operations as normalization and alignment are not considered, MAS281 performance figures are approximately 50% higher than those indicated in Table 6. 25 743.4 698.3 658.4 622.8 20 594.7 558.7 526.7 498.2 15 446.0 419.0 395.0 373.7 10 297.4 279.3 263.4 249.1 0123 Number of Wait States in Memory Access Cycle fOSC MHz Table 6: Throughput (KIPS) |
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