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MAS281 数据表(PDF) 27 Page - Dynex Semiconductor |
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MAS281 数据表(HTML) 27 Page - Dynex Semiconductor |
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27 / 55 page  MAS281 27/55 4.5 INTERNAL I/O COMMAND SUMMARY Operation Command Mnemonic Cycles * Implemented in MAS281 Set Fault Register 0401 SFR 2 3 9 Set Interrupt Mask 2000 SMK 2 3 9 Clear Interrupt request 2001 CLIR 2 3 9 Enable Interrupts 2002 ENBL 2 3 9 Disable Interrupts 2003 DSBL 2 3 9 Reset Pending Interrupt 2004 RPI 2 3 9 Set Pending Interrupt Register 2005 SPI 2 3 9 Reset Normal Power Up Discrete 200A RNS 2 3 9 Write Status Word 200E WSW 2 3a 8.5a Enable Start-Up ROM 4004 ESUR 2 3 9 Disable Start-Up ROM 4005 DSUR 2 3 9 Direct Memory Access Enable 4006 DMAE 2 3 9 Direct Memory Access Disable 4007 DMAD 2 3 9 Timer A Start 4008 TAS 2 3 9 Ti mer A Halt 4009 TAH 2 3 9 Output Timer A 400A OTA 2 3 9 Reset Trigger-Go 400B GO 2 3 9 Timer B Start 400C TBS 2 3 9 Timer B Halt 400D TBH 2 3 9 Output Timer B 400E OTB 2 3 9 Read Configuration Word 8400 RCW 2 2 4 Read Fault Register Without Clear 8401 RFR 2 2 4 Read Interrupt Mask A000 RMK 2 2 4 Read Pending Interrupt Register A004 RPIR 2 2 4 Read Status Word A00E RSW 2 1 4 Read and Clear Fault Register A00F RCFR 2 2 4 Input Timer A C00A ITA 2 2 4 input Timer B C00E ITB 2 2 4 Implemented in BPU Memory Protect Enable 4003 MPEN 2 4 8 Load Memory Protect RAM 50XX LMP 2 4 8 Read Memory Protect RAM D0XX RMP 2 3 3 Implemented in MMU Write Instruction Page Register 51XY WIPR 2 4 8 Write Operand Page Register 52XY WOPR 2 4 8 Read Memory Fault Status A00D RMFS 2 3 3 Read Instruction Page Register DlXY RIPR 2 3 3 Read Operand Page Register D2XY ROPR 2 3 3 * M = memory, P = processor (5 OSC cycles), B = processor (6 OSC cycles), a = average if more than one alternative exists MP B Table 7b: Internal I/O Command Summary |
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