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WM8960 数据表(PDF) 56 Page - Wolfson Microelectronics plc |
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WM8960 数据表(HTML) 56 Page - Wolfson Microelectronics plc |
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56 / 92 page  WM8960 Production Data w PD, August 2013, Rev 4.2 56 LOOPBACK Setting the LOOPBACK register bit enables digital loopback. When this bit is set the output data from the ADC audio interface is fed directly into the DAC data input. The ADCs and DACs must both use DACLRC when loopback is enabled. This is enabled by setting register bit ALRCGPIO = 1. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R9 Audio Interface 0 LOOPBACK 0 Digital Loopback Function 0 = No loopback. 1 = Loopback enabled, ADC data output is fed directly into DAC data input. Table 38 Loopback Control CLOCKING AND SAMPLE RATES Figure 36 Clocking Scheme Clocks for the ADCs and DACs, the DSP core functions, the digital audio interface and the class D outputs are all derived from SYSCLK as show in Figure 36. |
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