28F004SC datasheet(15/42 Pages) INTEL

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BYTE-WIDE SmartVoltage FlashFile™ MEMORY FAMILY

PRELIMINARY

Table 3. Bus Operations

Mode

Notes

RP#

CE#

OE#

WE#

Address

VPP

DQ0–7

RY/BY#

Read

1,2,3

VIH or

VHH

VIL

VIH

DOUT

Output Disable

VIH or

VHH

VIL

VIH

High Z

Standby

VIH or

VHH

VIH

High Z

Deep Power-Down

VIL

High Z

VOH

Read Identifier Codes

VIH or

VHH

VIL

VIH

See

Figure 5

Note 5

VOH

Write

3,6,7

VIH or

VHH

VIL

VIH

VIL

DIN

NOTES:

1. Refer to

DC Characteristics. When VPP

≤ VPPLK, memory contents can be read, but not altered.

2. X can be V

IL or VIH for control and address input pins and VPPLK or VPPH1/2/3 for VPP. See DC Characteristics for VPPLK and

VPPH1/2/3 voltages.

3. RY/BY# is VOL when the WSM is executing internal block erase, program, or lock-bit configuration algorithms. It is VOH

when the WSM is not busy, in block erase suspend mode (with program inactive), program suspend mode, or deep power-

down mode.

4. RP# at GND ± 0.2 V ensures the lowest deep power-down current.

5. See Section 4.2 for read identifier code data.

6. Command writes involving block erase, write, or lock-bit configuration are reliably executed when VPP = VPPH1/2/3 and

VCC = VCC2/3 (see Section 6.2 for operating conditions).

7. Refer to Table 4 for valid DIN during a write operation.

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