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28F004SC 数据表(PDF) 35 Page - Intel Corporation

部件名 28F004SC
功能描述  BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
PDF  42 Pages
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制造商  INTEL [Intel Corporation]
网页  http://www.intel.com
标志 INTEL - Intel Corporation

28F004SC 数据表(HTML) 35 Page - Intel Corporation

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E
BYTE-WIDE SmartVoltage FlashFile™ MEMORY FAMILY
35
PRELIMINARY
6.5
AC Characteristics—Read-Only Operations(1)—Commercial Temperature
TA = 0°C to +70°C
5 V ± 5% VCC
-85/-95(5)


Versions(4)
5 V ± 10% VCC
-90/-100(6)
-120

Unit
3.3 V ± 0.3 V VCC

-120
-150
2.7 V
−3.6 V VCC

-150
-170
#
Sym
Parameter
Notes Min Max Min Max Min Max Min Max Min Max
R1 tAVAV Read Cycle
4, 8 Mbit
85
90
120
150
170
ns
Time
16 Mbit
95
100
120
150
170
ns
R2 tAVQV Address to
4, 8 Mbit
85
90
120
150
170
ns
Output Delay 16 Mbit
95
100
120
150
170
ns
R3 tELQV CE# to Output 4, 8 Mbit
2
85
90
120
150
170
ns
Delay
16 Mbit
2
95
100
120
150
170
ns
R4 tGLQV OE# to Output Delay
2
40
45
50
55
55
ns
R5 tPHQV RP# High to Output
Delay
400
400
400/
600(7)
600
600
ns
R6 tELQX CE# to Output in Low Z
3
00
0
00
ns
R7 tGLQX OE# to Output in Low Z
3
00
0
00
ns
R8 tEHQZ CE# High to Output in
High Z
3
55
55
55
55
55
ns
R9 tGHQZ OE# High to Output in
High Z
3
10
10
15
20
25
ns
R10 tOH
Output Hold from
Address, CE# or OE#
Change, Whichever
Occurs First
3
00
0
00
ns
NOTES:
1.
See AC Input/Output Reference Waveform for maximum allowable input slew rate.
2.
OE# may be delayed up to tELQV–tGLQV after the falling edge of CE# without impact on tELQV.
3.
Sampled, not 100% tested.
4.
See
Ordering Information for device speeds (valid operational combinations).
5.
See Transient Input/Output Reference Waveform and Transient Equivalent Testing Load Circuit (High Speed
Configuration) for testing characteristics.
6.
See Transient Input/Output Reference Waveform and Transient Equivalent Testing Load Circuit (Standard Configuration)
for testing characteristics.
7.
Valid for 3.3 V VCC read operations.



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