E

BYTE-WIDE SmartVoltage FlashFile™ MEMORY FAMILY

33

PRELIMINARY

TEST POINTS

INPUT

OUTPUT

1.35

2.7

0.0

1.35

AC test inputs are driven at 2.7 V for a Logic "1" and 0.0 V for a Logic "0." Input timing begins, and output timing ends, at 1.35

V. Input rise and fall times (10% to 90%) <10 ns.

−3.6 V

TEST POINTS

INPUT

OUTPUT

1.5

3.0

0.0

1.5

AC test inputs are driven at 3.0 V for a Logic "1" and 0.0 V for a Logic "0." Input timing begins, and output timing ends, at 1.5 V.

Input rise and fall times (10% to 90%) <10 ns.

(High Speed Testing Configuration)

TEST POINTS

INPUT

OUTPUT

2.0

0.8

0.8

2.0

2.4

0.45

AC test inputs are driven at V

± 10%

(Standard Testing Configuration)

DEVICE

UNDER

TEST

1.3V

1N914

R

L

C

L

OUT

= 3.3 K

NOTE:

Figure 16. Transient Equivalent Testing

Load Circuit

Test Configuration Capacitance Loading Value

Test Configuration

± 0.3 V, 2.7 V−3.6 V

50

± 5%

30

± 10%

100