28F004SC datasheet(23/42 Pages) INTEL

23 / 42 page

BYTE-WIDE SmartVoltage FlashFile™ MEMORY FAMILY

PRELIMINARY

SR.7 =

Start

Write 40H,

Address

Write Byte

Data and Address

Full Status

Check if Desired

Program Complete

FULL STATUS CHECK PROCEDURE

Read Status Register

Data (See Above)

Read

Status Register

Range Error

Bus

Operation

Command

Comments

Standby

Check SR.3

1 = V

Error Detect

SR.4, SR.3 and SR.1 are only cleared by the Clear Status Register

command in cases where multiple locations are written before

full status is checked.

If error is detected, clear the Status Register before attempting

retry or other error recovery.

Bus

Operation

Command

Comments

Write

Setup

Program

Data = Data to Be Programmed

Addr = Location to Be Programmed

Read

Data = 40H

Addr = Location to Be Programmed

Check SR.7

1 = WSM Ready

0 = WSM Busy

Repeat for subsequent byte writes.

SR full status check can be done after each program, or after a

sequence of program operations.

Write FFH after the last program operation to reset device to

read array mode.

Standby

SR.3 =

SR.4 =

Program Error

Program Successful

Program

Status Register Data

Suspend

Program

Yes

Suspend

Program Loop

Standby

Check SR.4

1 = Program Error

Device Protect Error

SR.1 =

Check SR.1

1 = Device Protect Detect

RP# = V

, Block Lock-Bit Is Set

Only required for systems

implementing lock-bit configuration

Figure 8. Automated Program Flowchart

28F004SC 数据表(PDF) 23 Page - Intel Corporation

28F004SC 数据表(HTML) 23 Page - Intel Corporation

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28F004SC 数据表(PDF) 23 Page - Intel Corporation

28F004SC 数据表(HTML) 23 Page - Intel Corporation

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