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ST9 USER GUIDE

3.4.3.3 External Interrupt Vectors

There are eight external interrupt causes. They are each connected to an external input that is

the alternate function of an I/O port. Some of these are shared with other causes in an exclu-

sive manner, i.e., the INT0 pin is multiplexed with the Watchdog/Timer interrupt request, and

the INT5 pin is multiplexed with the Serial Peripheral Interface interrupt request (on the

ST92F150). Each cause is associated with a separate vector in Program Memory. All vectors

are contiguous, generating an array of 8 vectors starting with the INT0 vector, and ending with

the INT7 vector. This array may be freely located in program memory between addresses 8 to

240 (0F0h) in program memory.

These interrupt causes are grouped by pairs, and are given new names inside the interrupt

controller, as shown in the following table:

You can independently assign a priority to each pair (A, B, C, D), with levels that are multiple

of two, i.e. you can set them to priority levels 0, 2, 4, or 6. In each pair, the cause bearing the

figure zero assumes this priority, and the cause bearing the figure 1 assumes the next level

above. For example, if you assign level 4 to pair C, this means that INTC0 will have level 4 and

INTC1 level 5. You set this in register EIPLR (R245 page 0), where each group of two bits

gives the level of the corresponding interrupt cause.

The interrupt vectoring is summarized in the table below:

Interrupt Source

Interrupt Cause

INT 0

INT A0

INT 1

INT A1

INT 2

INT B0

INT 3

INT B1

INT 4

INT C0

INT 5

INT C1

INT 6

INT D0

INT 7

INT D1

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