ST9 datasheet(96/146 Pages) STMICROELECTRONICS

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ST9 USER GUIDE

– Re-enable the end of block interrupts by setting the Receive DMA Bit (RXD bit of register

IDPR).

– Restore the DMA capability by setting the receive address pointer (not the RDAPR) to the

address of the beginning of the receive buffer.

– Set the receive transaction counter (not the RDCPR) to the number of characters to be re-

ceived. This will re-enable the DMA capability.

In a typical application, command messages could have variable length and be terminated by

an LF character. So, the character match event capability built in to the SCI should be used.

If the Address/Data Compare Register (ACR) contains the value 10 (ASCII code for LF), and

the Receive Address Mask (RXA bit of register IMR) is set, whenever an LF character is re-

ceived, an interrupt is generated. This interrupt is considered in the application as a good Mes-

sage Received signal. It is processed the following way:

– In this application, no other characters are expected until the previous message has been

answered by the program. However, it may be useful to inhibit further DMA cycles by clearing

the RXD bit in the IDPR register and also the RXDI bit in the IMR register.

– Read the Receive Buffer Register (RXBR) to remove the interrupt request (see note below).

– Make use of the received characters.

– Restore the DMA capability by setting the receive address pointer (not the RDAPR) to the

address of the beginning of the receive buffer.

– Set the receive transaction counter (not the RDCPR) to the number of characters to be re-

ceived. This will re-enable the DMA capability.

Note:

When matching occurs between the incoming character and the ACR register contents, the

DMA request is not generated, neither is an interrupt request for “character received”. So, the

incoming character remains in the receive buffer and no other character can be received until it

has been removed. This is why it is not sufficient to clear the RXAP bit in the ISR register to

reinstate the DMA transfer. You must clear the RXBR register by reading it during the character

match interrupt service routine.

Finally, an error may occur during transmission. This can be a parity error (if parity checking is

enabled), a framing error or an overrun error. If one of these errors occurs, take the following

steps:

– Clear the bits that indicate an error condition in the ISR register.

– Restore the DMA capability by setting the receive address pointer (not the RDAPR) to the

address of the beginning of the receive buffer.

– Set the receive transaction counter (not the RDCPR) to the number of characters to be re-

ceived. This will re-enable the DMA capability.

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