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ST9 数据表(PDF) 14 Page - STMicroelectronics |
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ST9 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 146 page ![]() 14/146 ST9 USER GUIDE 3 PROCESSOR CORE: MAIN CONCEPTS The term ST9 designates a family of components. Each component shares the same core, surrounded by a particular configuration of memory and peripherals that make up the specific variant. The ST9 core has a unique and powerful structure. This chapter explains the main building blocks that you need to get familiar with to be able to make full use of its capabilities. The main features of the core architecture are: – Register-Oriented Programming Model – Single-Space memory addressing – System and User Stacks – Interrupt system with fully integrated controller – Built-in DMA mechanism – Reset and Clock Control Unit (RCCU) with PLL 3.1 ADDRESS SPACES The ST9 provides two different address spaces: Register Space and Memory Space. The Register Space draws its power from its size: 256 registers of which 224 are uncommitted, and from the fact that it can hold data or pointers to data that reside in any of the two spaces. The Memory spaces can address up to 4 Mbytes. This address space is arranged as 64 seg- ments of 64 Kbytes to address Programs and as 256 segments of 16 Kbytes to address Data when the DMA is not used. 3.1.1 Register-Oriented Programming Model The usual microprocessor core structure is based on an accumulator. The accumulator is the one register that holds the data to work on and the results of the arithmetic or logical opera- tions applied to it. This structure has become a classic - for its simplicity - the internal data paths of the microprocessor all converge to the accumulator. The instruction set is simple, since you need to specify only one memory address in a data move instruction, the other being implicit: the accumulator itself. This simplicity has its own drawbacks: the accumulator is the computation bottleneck, since to move data from one place in memory to another place, you have to do it through the accumu- lator. The simplest transfer involves at least two instructions: one to get the data, the other one to store it. Register-Oriented models, in contrast, allow you to move data directly from one place to an- other in a single instruction. Data can come from a register or from a memory address and can go to either to a register or a memory address. You can code the addresses in the instruction, or store them in registers referenced by the instruction. This allows you to optimize your code |
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