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ST9 数据表(PDF) 99 Page - STMicroelectronics |
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ST9 数据表(HTML) 99 Page - STMicroelectronics |
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99 / 146 page ![]() 99/146 ST9 USER GUIDE Figure 46 . A/D Converter Block Diagram The conversion cycle can either be started in Single mode, by a trigger (software or hardware, the later being internal or external) or in Continuous mode, restarted as soon as the previous cycle is finished. Each channel uses one bit of a port (the port depends on the variant of the ST9), and the con- version result is stored in a 16-bit register. Sixteen such registers are available, named AD_D0R to AD_D15R. These 16 bit registers are data registers are made up of two 8-bit reg- 16 10 2 A/D End of conversion or AWD interrupt to the core 3 bits of CICR 4 bits of AD_ICR Priority Mechanism 1 bit of AD_IVR A/D or AWD Interrupt Vector selection Pending & Mask bits 4 bits of AD_CRR Compare Result Analog Watchdog Threshold registers 16-bit H/L(Ch.A) Threshold registers 16-bit H/L(Ch.B) 4 bits of CLR1 Data Register A/D Converter AIN pins channels 0 to 16 Autoscan Logic See fully detailed diagram of the A/D converter in Section 6 Synchronisation to Start/Stop the A/D Converter 4 bits of CLR1 EXTRG pin 3 bits of AD_ICR 2 4 bits of |
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