ST9 datasheet(44/146 Pages) STMICROELECTRONICS

44 / 146 page

44/146

ST9 USER GUIDE

T0_IVR (R242 page 9)

Where V4-V0 (fixed by software) are the high bits of the low byte address memory where the

vector for the first interrupt cause is located. Since there are three different interrupt causes,

and the address of each interrupt service routine occupies two bytes, the IVR must be loaded

with an address between 8 and 250 that is a multiple of 8 (i.e. the lower three bits are zero).

The layout above shows two bits W1 and W0 (fixed by hardware), and a third bit that is per-

manently set to zero. The two W1-W0 bits code four different possible interrupt causes, as in

the following table:

When an interrupt occurs, the resulting value is an address that is the value written in IVR

(here 40H), plus the value coded by the cause (if the cause is a capture event, W1-W0 are 10,

thus the value is 4).

This gives an even number, since the least significant bit is zero, as follows:

So IVR points to address XX 0044H (with XX the ISR segment number), which must contain

a word that is equal to the address in the ISR segment of the Interrupt Service Routine for that

cause.

An example of the code for setting the IVR is:

void ConfigTimer0 ( void )

{

/* setting other registers... */

SelectPage (T0C_PG) ;

T0_IVR = (unsigned char)INTRELOADVECT ;/* Array of pointers to service

routines in ROM */

/* setting other registers, continued... */

}

'0'

Interrupt Source

Overflow/ Underflow event interrupts

Not available

Capture event interrupts

Compare event interrupts

1000

100

ST9 数据表(PDF) 44 Page - STMicroelectronics