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LSM6DS33 数据表(PDF) 62 Page - STMicroelectronics |
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LSM6DS33 数据表(HTML) 62 Page - STMicroelectronics |
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62 / 77 page  Register description LSM6DS33 62/77 DocID027423 Rev 4 9.44 TIMESTAMP0_REG (40h) Time stamp first byte data output register (r). The value is expressed as a 24-bit word and the bit resolution is defined by setting the value in WAKE_UP_DUR (5Ch). 9.45 TIMESTAMP1_REG (41h) Time stamp second byte data output register (r). The value is expressed as a 24-bit word and the bit resolution is defined by setting value in WAKE_UP_DUR (5Ch). 9.46 TIMESTAMP2_REG (42h) Time stamp third byte data output register (r/w). The value is expressed as a 24-bit word and the bit resolution is defined by setting the value in WAKE_UP_DUR (5Ch). To reset the timer, the AAh value has to be stored in this register. 9.47 STEP_TIMESTAMP_L (49h) Step counter timestamp information register (r). When a step is detected, the value of TIMESTAMP_REG1 register is copied in STEP_TIMESTAMP_L. Table 117. TIMESTAMP0_REG register TIMESTA MP0_7 TIMESTA MP0_6 TIMESTA MP0_5 TIMESTA MP0_4 TIMESTA MP0_3 TIMESTA MP0_2 TIMESTA MP0_1 TIMESTA MP0_0 Table 118. TIMESTAMP0_REG register description TIMESTAMP0_[7:0] TIMESTAMP first byte data output Table 119. TIMESTAMP1_REG register TIMESTA MP1_7 TIMESTA MP1_6 TIMESTA MP1_5 TIMESTA MP1_4 TIMESTA MP1_3 TIMESTA MP1_2 TIMESTA MP1_1 TIMESTA MP1_0 Table 120. TIMESTAMP1_REG register description TIMESTAMP1_[7:0] TIMESTAMP second byte data output Table 121. TIMESTAMP2_REG register TIMESTA MP2_7 TIMESTA MP2_6 TIMESTA MP2_5 TIMESTA MP2_4 TIMESTA MP2_3 TIMESTA MP2_2 TIMESTA MP2_1 TIMESTA MP2_0 Table 122. TIMESTAMP2_REG register description TIMESTAMP2_[7:0] TIMESTAMP third byte data output Table 123. STEP_TIMESTAMP_L register STEP_ TIMESTA MP_L_7 STEP_ TIMESTA MP_L_6 STEP_ TIMESTA MP_L_5 STEP_ TIMESTA MP_L_4 STEP_ TIMESTA MP_L_3 STEP_ TIMESTA MP_L_2 STEP_ TIMESTA MP_L_1 STEP_ TIMESTA MP_L_0 Table 124. STEP_TIMESTAMP_L register description STEP_TIMESTAMP_L[7:0] Timestamp of last step detected. |
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