LSM6DS33 datasheet(24/77 Pages) STMICROELECTRONICS

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Functionality

LSM6DS33

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Writing data in the FIFO can be configured to be triggered by the:

- accelerometer/gyroscope data-ready signal; in which case the ODR must be lower than or

equal to both the accelerometer and gyroscope ODRs;

- step detection signal.

In addition, each data can be stored at a decimated data rate compared to FIFO ODR and it

is configurable by the user, setting the registers FIFO_CTRL3 (08h) and FIFO_CTRL4

(09h). The available decimation factors are 2, 3, 4, 8, 16, 32.

Programmable FIFO threshold can be set in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h)

using the FTH [11:0] bits.

To monitor the FIFO status, dedicated registers (FIFO_STATUS1 (3Ah), FIFO_STATUS2

(3Bh), FIFO_STATUS3 (3Ch), FIFO_STATUS4 (3Dh)) can be read to detect FIFO overrun

events, FIFO full status, FIFO empty status, FIFO threshold status and the number of

unread samples stored in the FIFO. To generate dedicated interrupts on the INT1 and INT2

pads of these status events, the configuration can be set in INT1_CTRL (0Dh) and

INT2_CTRL (0Eh).

FIFO buffer can be configured according to five different modes:

– Bypass mode

– FIFO mode

– Continuous mode

– Continuous-to-FIFO mode

– Bypass-to-continuous mode

Each mode is selected by the FIFO_MODE_[2:0] in FIFO_CTRL5 (0Ah) register. To

guarantee the correct acquisition of data during the switching into and out of FIFO mode,

the first sample acquired must be discarded.

5.4.1

Bypass mode

In Bypass mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 000), the FIFO is not

operational and it remains empty.

Bypass mode is also used to reset the FIFO when in FIFO mode.

5.4.2

FIFO mode

In FIFO mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 001) data from the output

channels are stored in the FIFO until it is full.

To reset FIFO content, Bypass mode should be selected by writing FIFO_CTRL5 (0Ah)

(FIFO_MODE_[2:0]) to '000' After this reset command, it is possible to restart FIFO mode by

writing FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0]) to '001'.

FIFO buffer memorizes up to 4096 samples of 16 bits each but the depth of the FIFO can be

resized by setting the FTH [11:0] bits in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h). If the

STOP_ON_FTH bit in CTRL4_C (13h) is set to '1', FIFO depth is limited up to FTH [11:0]

bits in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h).

5.4.3

Continuous mode

Continuous mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 110) provides a continuous

FIFO update: as new data arrives, the older data is discarded.

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