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LAN9211 数据表(PDF) 116 Page - SMSC Corporation |
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LAN9211 数据表(HTML) 116 Page - SMSC Corporation |
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116 / 147 page ![]() High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support Datasheet Revision 2.9 (03-01-12) 116 SMSC LAN9211 DATASHEET 5.5 PHY Registers The PHY registers are not memory mapped. These registers are accessed indirectly through the MAC via the MII_ACC and MII_DATA registers. An index must be used to access individual PHY registers. PHY Register Indexes are shown in Table 5.8, "LAN9211 PHY Control and Status Register". Note: The NASR (Not Affected by Software Reset) designation is only applicable when bit 15 of the PHY Basic Control Register (Reset) is set. Table 5.8 LAN9211 PHY Control and Status Register PHY CONTROL AND STATUS REGISTERS INDEX (IN DECIMAL) REGISTER NAME 0 Basic Control Register 1 Basic Status Register 2 PHY Identifier 1 3 PHY Identifier 2 4 Auto-Negotiation Advertisement Register 5 Auto-Negotiation Link Partner Ability Register 6 Auto-Negotiation Expansion Register 17 Mode Control/Status Register 18 Special Modes Register 27 Special Control/Status Indications 29 Interrupt Source Register 30 Interrupt Mask Register 31 PHY Special Control/Status Register |
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