LAN9211 datasheet(37/147 Pages) SMSC

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High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

Datasheet

SMSC LAN9211

Revision 2.9 (03-01-12)

DATASHEET

3.9

EEPROM Interface

The LAN9211 can optionally load its MAC address from an external serial EEPROM. If a properly

configured EEPROM is detected by the LAN9211 at power-up, hard reset or soft reset, the ADDRH

and ADDRL registers will be loaded with the contents of the EEPROM. If a properly configured

EEPROM is not detected, it is the responsibility of the host LAN Driver to set the IEEE addresses.

The LAN9211 EEPROM controller also allows the host system to read, write and erase the contents

of the Serial EEPROM. The EEPROM controller supports most “93C46” type EEPROMs configured for

128 x 8-bit operation.

3.9.1

MAC Address Auto-Load

On power-up, hard reset or soft reset, the EEPROM controller attempts to read the first byte of data

from the EEPROM (address 00h). If the value A5h is read from the first address, then the EEPROM

controller will assume that an external Serial EEPROM is present. The EEPROM controller will then

access the next EEPROM byte and send it to the MAC Address register byte 0 (ADDRL[7:0]). This

process will be repeated for the next five bytes of the MAC Address, thus fully programming the 48-

bit MAC address. Once all six bytes have been programmed, the “MAC Address Loaded” bit is set in

the E2P_CMD register. A detailed explanation of the EEPROM byte ordering with respect to the MAC

address is given in Section 5.4.3, "ADDRL—MAC Address Low Register," on page 109.

If an 0xA5h is not read from the first address, the EEPROM controller will end initialization. It is then

the responsibility of the host LAN driver software to set the IEEE address by writing to the MAC’s

ADDRH and ADDRL registers.

The host can initiate a reload of the MAC address from the EEPROM by issuing the RELOAD

command via the E2P command (E2P_CMD) register. If the first byte read from the EEPROM is not

A5h, it is assumed that the EEPROM is not present, or not programmed, and the MAC address reload

will fail. The “MAC Address Loaded” bit indicates a successful reload of the MAC address.

3.9.2

EEPROM Host Operations

After the EEPROM controller has finished reading (or attempting to read) the MAC after power-on, hard

reset or soft reset, the host is free to perform other EEPROM operations. EEPROM operations are

performed using the E2P_CMD and E2P data (E2P_DATA) registers. Section 5.3.23, "E2P_CMD –

EEPROM Command Register," on page 101 provides an explanation of the supported EEPROM

operations.

If the EEPROM operation is the “write location” (WRITE) or “write all” (WRAL) commands, the host

must first write the desired data into the E2P_DATA register. The host must then issue the WRITE or

WRAL command using the E2P_CMD register by setting the EPC_CMD field appropriately. If the

operation is a WRITE, the EPC_ADDR field in E2P_CMD must also be set to the desired location. The

command is executed when the host sets the EPC_BSY bit high. The completion of the operation is

indicated when the EPC_BSY bit is cleared.

If the EEPROM operation is the “read location” (READ) operation, the host must issue the READ

command using the E2P_CMD with the EPC_ADDR set to the desired location. The command is

executed when the host sets the EPC_BSY bit high. The completion of the operation is indicated when

the EPC_BSY bit is cleared, at which time the data from the EEPROM may be read from the

E2P_DATA register.

Other EEPROM operations are performed by writing the appropriate command to the EPC_CMD

operation is indicated when the EPC_BSY bit is cleared. In all cases the host must wait for EPC_BSY

to clear before modifying the E2P_CMD register.

Note: The EEPROM device powers-up in the erase/write disabled state. To modify the contents of

the EEPROM the host must first issue the EWEN command.

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