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LAN9211 数据表(PDF) 38 Page - SMSC Corporation

部件名 LAN9211
功能描述  High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
PDF  147 Pages
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制造商  SMSC [SMSC Corporation]
网页  http://www.smsc.com
标志 SMSC - SMSC Corporation

LAN9211 数据表(HTML) 38 Page - SMSC Corporation

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High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
Revision 2.9 (03-01-12)
38
SMSC LAN9211
DATASHEET
If an operation is attempted, and an EEPROM device does not respond within 30mS, the LAN9211
will timeout, and the EPC timeout bit (EPC_TO) in the E2P_CMD register will be set.
Figure 3.10, "EEPROM Access Flow Diagram" illustrates the host accesses required to perform an
EEPROM Read or Write operation.
The host can disable the EEPROM interface through the GPIO_CFG register. When the interface is
disabled, the EEDIO and ECLK signals can be used as general-purpose outputs, or they may be used
to monitor internal MII signals.
3.9.2.1
Supported EEPROM Operations
The EEPROM controller supports the following EEPROM operations under host control via the
E2P_CMD register. The operations are commonly supported by “93C46” EEPROM devices. A
description and functional timing diagram is provided below for each operation. Please refer to the
E2P_CMD register description in Section 5.3.23, "E2P_CMD – EEPROM Command Register," on
page 101 for E2P_CMD field settings for each command.
Figure 3.10 EEPROM Access Flow Diagram
Idle
Write Data
Register
Write
Command
Register
Read
Command
Register
Busy Bit = 0
Idle
Write
Command
Register
Read
Command
Register
Read Data
Register
Busy Bit = 0
EEPROM Write
EEPROM Read



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