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LAN9211 数据表(PDF) 136 Page - SMSC Corporation |
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LAN9211 数据表(HTML) 136 Page - SMSC Corporation |
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136 / 147 page  High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support Datasheet Revision 2.9 (03-01-12) 136 SMSC LAN9211 DATASHEET 6.9 EEPROM Timing The following specifies the EEPROM timing requirements for the LAN9211: Figure 6.8 EEPROM Timing Table 6.10 EEPROM Timing Values SYMBOL DESCRIPTION MIN TYP MAX UNITS tCKCYC EECLK Cycle time 1110 1130 ns tCKH EECLK High time 550 570 ns tCKL EECLK Low time 550 570 ns tCSHCKH EECS high before rising edge of EECLK 1070 ns tCKLCSL EECLK falling edge to EECS low 30 ns tDVCKH EEDIO valid before rising edge of EECLK (OUTPUT) 550 ns tCKHDIS EEDIO disable after rising edge EECLK (OUTPUT) 550 ns tDSCKH EEDIO setup to rising edge of EECLK (INPUT) 90 ns tDHCKH EEDIO hold after rising edge of EECLK (INPUT) 0ns tCKLDIS EECLK low to data disable (OUTPUT) 580 ns tCSHDV EEDIO valid after EECS high (VERIFY) 600 ns tDHCSL EEDIO hold after EECS low (VERIFY) 0 ns tCSL EECS low 1070 ns |
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