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ADRF6820ACPZ-R7 数据表(PDF) 41 Page - Analog Devices |
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ADRF6820ACPZ-R7 数据表(HTML) 41 Page - Analog Devices |
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41 / 45 page ![]() Data Sheet ADRF6820 Rev. C | Page 41 of 45 Address: 0x34, Reset: 0x0B00, Name: MOD_CTL2 Table 32. Bit Descriptions for MOD_CTL2 Bits Bit Name Settings Description Reset Access [11:10] BB_BIAS Baseband bias select 0x2 RW 00 0 mA 01 4.5 mA 10 9 mA 11 13.5 mA [9:8] BWSEL Baseband gain and bandwidth select 0x3 RW 00 High gain, high bandwidth (refer to Table 15) 01 High gain, low bandwidth (refer to Table 15) 10 Low gain, high bandwidth (refer to Table 15) 11 Low gain, low bandwidth (refer to Table 15) |
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