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LSM303D 数据表(PDF) 14 Page - STMicroelectronics |
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LSM303D 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 52 page ![]() Module specifications LSM303D 14/52 DocID023312 Rev 2 2.4.2 Sensor I2C - inter-IC control interface Subject to general operating conditions for Vdd and Top. Figure 4. I2C slave timing diagram Note: Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO for both ports. Table 7. I2C slave timing values Symbol Parameter I2C standard mode (1) I2C fast mode (1) Unit Min. Max. Min. Max. f(SCL) SCL clock frequency 0 100 0 400 kHz tw(SCLL) SCL clock low time 4.7 1.3 μs tw(SCLH) SCL clock high time 4.0 0.6 tsu(SDA) SDA setup time 250 100 ns th(SDA) SDA data hold time 0 3.45 0 0.9 μs tr(SDA) tr(SCL) SDA and SCL rise time 1000 20 + 0.1Cb(2) 300 ns tf(SDA) tf(SCL) SDA and SCL fall time 300 20 + 0.1Cb(2) 300 th(ST) START condition hold time 4 0.6 μs tsu(SR) Repeated START condition setup time 4.7 0.6 tsu(SP) STOP condition setup time 4 0.6 tw(SP:SR) Bus free time between STOP and START condition 4.7 1.3 1. Data based on standard I2C protocol requirement, not tested in production. 2. Cb = total capacitance of one bus line, in pF. SDA SCL tf(SDA) tsu(SP) tw(SCLL) tsu(SDA) tr(SDA) tsu(SR) th(ST) tw(SCLH) th(SDA) tr(SCL) tf(SCL) tw(SP:SR) START REPEATED START STO P START |
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