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LSM303D 数据表(PDF) 46 Page - STMicroelectronics |
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LSM303D 数据表(HTML) 46 Page - STMicroelectronics |
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46 / 52 page ![]() Register description LSM303D 46/52 DocID023312 Rev 2 The D6 - D0 bits set the minimum duration of the interrupt 2 event to be recognized. Duration steps and maximum values depend on the ODR chosen. 8.38 CLICK_CFG (38h) Table 79. IG_DUR2 register description D6 - D0 Duration value. Default value: 000 0000 Table 80. CLICK_CFG register -- -- ZD ZS YD YS XD XS Table 81. CLICK_CFG register description ZD Enable interrupt double-click on Z-axis. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value higher than preset threshold) ZS Enable interrupt single-click on Z-axis. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value higher than preset threshold) YD Enable interrupt double-click on Y-axis. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value higher than preset threshold) YS Enable interrupt single-click on Y-axis. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value higher than preset threshold) XD Enable interrupt double-click on X-axis. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value higher than preset threshold) XS Enable interrupt single-click on X-axis. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value higher than preset threshold) |
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