LSM303D datasheet(19/52 Pages) STMICROELECTRONICS

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DocID023312 Rev 2

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LSM303D

Application hints

Figure 5. LSM303D electrical connections

5.1

External capacitors

The C1 and C2 external capacitors should be low SR value ceramic type construction (typ.

recommended value 200 m

). Reservoir capacitor C1 is nominally 4.7 μF in capacitance,

with the set/reset capacitor C2 nominally 0.22 μF in capacitance.

The device core is supplied through the Vdd line. Power supply decoupling capacitors

(C4 = 100 nF ceramic, C3 = 10 μF Al) should be placed as near as possible to the supply pin

of the device (common design practice). All the voltage and ground supplies must be

present at the same time to have proper behavior of the IC (refer to Figure 5).

The functionality of the device and the measured acceleration/magnetic field data is

selectable and accessible through the I2C/SPI interfaces.

The functions, the threshold and the timing of the two interrupt pins (INT 1 and INT 2) can be

completely programmed by the user through the I2C/SPI interfaces.

5.2

Pull-up resistors

If an I2C interface is used, pull-up resistors (recommended value 10 k

) must be placed on

the two I2C bus lines.

C3= 10µF

Vdd

C4 = 100nF

GND

Vdd_IO

INT 1

Digital signal from/to signal controller. Signal levels are defined by proper selection of Vdd_IO

TOP VIEW

INT 2

C1= 4.7µF

C2=0.22µF

AM12678V1

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