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STM32F100RC 数据表(PDF) 59 Page - STMicroelectronics |
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STM32F100RC 数据表(HTML) 59 Page - STMicroelectronics |
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59 / 106 page  DocID15081 Rev 10 59/106 STM32F100xC, STM32F100xD, STM32F100xE Electrical characteristics 105 Figure 16. Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms 1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used. Table 31. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings(1)(2) 1. CL = 15 pF. 2. Preliminary values. Symbol Parameter Min Max Unit tw(NE) FSMC_NE low time 3THCLK – 1 3THCLK + 2 ns tv(NWE_NE) FSMC_NEx low to FSMC_NWE low THCLK – 0.5 THCLK + 1.5 ns tw(NWE) FSMC_NWE low time THCLK – 0.5 THCLK + 1.5 ns th(NE_NWE) FSMC_NWE high to FSMC_NE high hold time THCLK -ns tv(A_NE) FSMC_NEx low to FSMC_A valid - 7.5 ns th(A_NWE) Address hold time after FSMC_NWE high THCLK -ns tv(BL_NE) FSMC_NEx low to FSMC_BL valid - 1.5 ns th(BL_NWE) FSMC_BL hold time after FSMC_NWE high THCLK – 0.5 - ns tv(Data_NE) FSMC_NEx low to Data valid - THCLK + 7 ns th(Data_NWE) Data hold time after FSMC_NWE high THCLK -ns tv(NADV_NE) FSMC_NEx low to FSMC_NADV low - 5.5 ns tw(NADV) FSMC_NADV low time - THCLK + 1.5 ns NBL Data FSMC_NEx FSMC_NBL[3:0] FSMC_D[15:0] tv(BL_NE) th(Data_NWE) FSMC_NOE Address FSMC_A[25:0] tv(A_NE) tw(NWE) FSMC_NWE tv(NWE_NE) t h(NE_NWE) th(A_NWE) th(BL_NWE) tv(Data_NE) tw(NE) ai14990 FSMC_NADV(1) t v(NADV_NE) tw(NADV) |
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