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STM32F100RC 数据表(PDF) 60 Page - STMicroelectronics |
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STM32F100RC 数据表(HTML) 60 Page - STMicroelectronics |
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60 / 106 page  Electrical characteristics STM32F100xC, STM32F100xD, STM32F100xE 60/106 DocID15081 Rev 10 Figure 17. Asynchronous multiplexed PSRAM/NOR read waveforms Table 32. Asynchronous multiplexed PSRAM/NOR read timings(1)(2) 1. CL = 15 pF. 2. Preliminary values. Symbol Parameter Min Max Unit tw(NE) FSMC_NE low time 7THCLK – 2 7THCLK + 2 ns tv(NOE_NE) FSMC_NEx low to FSMC_NOE low 3THCLK – 0.5 3THCLK + 1.5 ns tw(NOE) FSMC_NOE low time 4THCLK – 1 4THCLK + 2 ns th(NE_NOE) FSMC_NOE high to FSMC_NE high hold time –1 - ns tv(A_NE) FSMC_NEx low to FSMC_A valid - 0 ns tv(NADV_NE) FSMC_NEx low to FSMC_NADV low 3 5 ns tw(NADV) FSMC_NADV low time THCLK –1.5 THCLK + 1.5 ns th(AD_NADV) FSMC_AD (address) valid hold time after FSMC_NADV high THCLK - ns th(A_NOE) Address hold time after FSMC_NOE high THCLK - ns th(BL_NOE) FSMC_BL hold time after FSMC_NOE high 0 - ns tv(BL_NE) FSMC_NEx low to FSMC_BL valid - 0 ns tsu(Data_NE) Data to FSMC_NEx high setup time 2THCLK + 24 - ns tsu(Data_NOE) Data to FSMC_NOE high setup time 2THCLK + 25 - ns th(Data_NE) Data hold time after FSMC_NEx high 0 - ns th(Data_NOE) Data hold time after FSMC_NOE high 0 - ns |
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