数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

STM32F100RC 数据表(PDF) 88 Page - STMicroelectronics

部件名 STM32F100RC
功能描述  Clock, reset and supply management
PDF  106 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F100RC 数据表(HTML) 88 Page - STMicroelectronics

Back Button STM32F100RC Datasheet HTML 84Page - STMicroelectronics STM32F100RC Datasheet HTML 85Page - STMicroelectronics STM32F100RC Datasheet HTML 86Page - STMicroelectronics STM32F100RC Datasheet HTML 87Page - STMicroelectronics STM32F100RC Datasheet HTML 88Page - STMicroelectronics STM32F100RC Datasheet HTML 89Page - STMicroelectronics STM32F100RC Datasheet HTML 90Page - STMicroelectronics STM32F100RC Datasheet HTML 91Page - STMicroelectronics STM32F100RC Datasheet HTML 92Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 88 / 106 page
background image
Electrical characteristics
STM32F100xC, STM32F100xD, STM32F100xE
88/106
DocID15081 Rev 10
5.3.19
DAC electrical specifications
Table 55. DAC characteristics
Symbol
Parameter
Min
Typ
Max(1) Unit
Comments
VDDA
Analog supply voltage
2.4
-
3.6
V
-
VREF+
Reference supply voltage
2.4
-
3.6
V
VREF+ must always be below
VDDA
VSSA
Ground
0
-
0
V
-
RLOAD(1)
Resistive load with buffer ON
5
-
-
k
Ω
-
RO(1)
Impedance output with buffer OFF
-
-
15
k
Ω
When the buffer is OFF, the
Minimum resistive load
between DAC_OUT and VSS to
have a 1% accuracy is 1.5 M
Ω
CLOAD(1)
Capacitive load
-
-
50
pF
Maximum capacitive load at
DAC_OUT pin (when the buffer
is ON).
DAC_OUT
min(1)
Lower DAC_OUT voltage with buffer
ON
0.2
-
-
V
It gives the maximum output
excursion of the DAC.
It corresponds to 12-bit input
code (0x0E0) to (0xF1C) at
VREF+ = 3.6 V and (0x155) and
(0xEAB) at VREF+ = 2.4 V
DAC_OUT
max(1)
Higher DAC_OUT voltage with buffer
ON
--
VDDA
0.2
V
DAC_OUT
min(1)
Lower DAC_OUT voltage with buffer
OFF
-0.5
-
mV
It gives the maximum output
excursion of the DAC.
DAC_OUT
max(1)
Higher DAC_OUT voltage with buffer
OFF
--
VREF+
– 1LSB
V
IDDVREF+
DAC DC current consumption in
quiescent mode (Standby mode)
-
-
220
µA
With no load, worst code
(0xF1C) at VREF+ = 3.6 V in
terms of DC consumption on
the inputs
IDDA
DAC DC current consumption in
quiescent mode (2)
-
-
380
µA
With no load, middle code
(0x800) on the inputs
-
-
480
µA
With no load, worst code
(0xF1C) at VREF+ = 3.6 V in
terms of DC consumption on
the inputs
DNL(1)
Differential non linearity Difference
between two consecutive code-1LSB)
--
±0.5
LSB
Given for the DAC in 10-bit
configuration
--
±2
LSB
Given for the DAC in 12-bit
configuration
INL(1)
Integral non linearity (difference
between measured value at Code i
and the value at Code i on a line
drawn between Code 0 and last Code
1023)
--
±1
LSB
Given for the DAC in 10-bit
configuration
--
±4
LSB
Given for the DAC in 12-bit
configuration



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com