STM32F100RC datasheet(86/106 Pages) STMICROELECTRONICS

部件名	STM32F100RC

功能描述	Clock, reset and supply management

PDF	106 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

86 / 106 page

Electrical characteristics

STM32F100xC, STM32F100xD, STM32F100xE

86/106

DocID15081 Rev 10

Note:

Any positive injection current within the limits specified for IINJ(PIN) and ΣIINJ(PIN) in

Section 5.3.13 does not affect the ADC accuracy.

Figure 33. ADC accuracy characteristics

Figure 34. Typical connection diagram using the ADC

1. Refer to Table 51 for the values of RAIN, RADC and CADC.

2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the

pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy

this, fADC should be reduced.

General PCB design guidelines

Power supply decoupling should be performed as shown in Figure 35 or Figure 36,

depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be

ceramic (good quality). They should be placed them as close as possible to the chip.

STM32F100RC 数据表(PDF) 86 Page - STMicroelectronics