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MB96F348CWCPMC-GSE2 数据表(PDF) 33 Page - Cypress Semiconductor |
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MB96F348CWCPMC-GSE2 数据表(HTML) 33 Page - Cypress Semiconductor |
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33 / 109 page  MB96340 Series Document Number: 002-04579 Rev. *A Page 33 of 109 000382H DMA2 - Interrupt select DISEL2 R/W 000383H DMA3 - Interrupt select DISEL3 R/W 000384H DMA4 - Interrupt select DISEL4 R/W 000385H DMA5 - Interrupt select DISEL5 R/W 000386H-00038FH Reserved - 000390H DMA - Status register low byte DSRL DSR R/W 000391H DMA - Status register high byte DSRH R/W 000392H DMA - Stop status register low byte DSSRL DSSR R/W 000393H DMA - Stop status register high byte DSSRH R/W 000394H DMA - Enable register low byte DERL DER R/W 000395H DMA - Enable register high byte DERH R/W 000396H-00039FH Reserved - 0003A0H Interrupt level register ILR ICR R/W 0003A1H Interrupt index register IDX R/W 0003A2H Interrupt vector table base register Low TBRL TBR R/W 0003A3H Interrupt vector table base register High TBRH R/W 0003A4H Delayed Interrupt register DIRR R/W 0003A5H Non Maskable Interrupt register NMI R/W 0003A6H-0003ABH Reserved - 0003ACH EDSU communication interrupt selection Low EDSU2L EDSU2 R/W 0003ADH EDSU communication interrupt selection High EDSU2H R/W 0003AEH ROM mirror control register ROMM R/W 0003AFH EDSU configuration register EDSU R/W 0003B0H Memory patch control/status register ch 0/1 PFCS0 R/W 0003B1H Memory patch control/status register ch 0/1 R/W 0003B2H Memory patch control/status register ch 2/3 PFCS1 R/W 0003B3H Memory patch control/status register ch 2/3 R/W 0003B4H Memory patch control/status register ch 4/5 PFCS2 R/W 0003B5H Memory patch control/status register ch 4/5 R/W 0003B6H Memory patch control/status register ch 6/7 PFCS3 R/W 0003B7H Memory patch control/status register ch 6/7 R/W 0003B8H Memory Patch function - Patch address 0 low PFAL0 R/W Table 4: I/O map MB96(F)34x Address Register Abbreviation 8-bit access Abbreviation 16-bit access Access |
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