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MB96F348CWCPMC-GSE2 数据表(PDF) 71 Page - Cypress Semiconductor |
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MB96F348CWCPMC-GSE2 数据表(HTML) 71 Page - Cypress Semiconductor |
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71 / 109 page ![]() MB96340 Series Document Number: 002-04579 Rev. *A Page 71 of 109 14.4.2 Internal Clock timing 14.4.3 External Reset timing (TA = -40°C to 125°C, VCC = AVCC = 3.0V to 5.5V, VSS = AVSS = 0V) Parameter Symbol Core Voltage Settings Unit Remarks 1.8V 1.9V Min Max Min Max Internal System clock frequency (CLKS1 and CLKS2) fCLKS1, fCLKS2 0 92 0 96 MHz Others than below 0 86 0 96 MHz MB96F348T/H/CxB/C 0 72080 MHz MB96F345 0 68 0 74 MHz MB96F34xY/R/Axx Internal CPU clock frequency (CLKB), internal peripheral clock frequency (CLKP1) fCLKB, fCLKP1 0 52 0 56 MHz Others than below 0 36040 MHz MB96F345 Internal peripheral clock frequency (CLKP2) fCLKP2 0 28 0 32 MHz Others than below 0 26 0 28 MHz MB96F34xY/R/Axx (TA = -40°C to 125°C, VCC = AVCC = 3.0V to 5.5V, VSS = AVSS = 0V) Parameter Symbol Pin Value Unit Remarks Min Typ Max Reset input time tRSTL RSTX 500 - - ns 0.2 VCC RSTX tRSTL 0.2 VCC |
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