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MB96F348CWCPMC-GSE2 数据表(PDF) 50 Page - Cypress Semiconductor |
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MB96F348CWCPMC-GSE2 数据表(HTML) 50 Page - Cypress Semiconductor |
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50 / 109 page  MB96340 Series Document Number: 002-04579 Rev. *A Page 50 of 109 Note: Any write access to reserved addresses in the I/O map should not be performed. A read access to a reserved address results in reading ‘X’.Registers of resources which are described in this table, but which are not supported by the device, should also be handled as “Reserved”. 000884H-00088FH Reserved - 000890H CAN1 - New Data 1 Register Low NEWDT1L1 NEWDT11 R 000891H CAN1 - New Data 1 Register High NEWDT1H1 R 000892H CAN1 - New Data 2 Register Low NEWDT2L1 NEWDT21 R 000893H CAN1 - New Data 2 Register High NEWDT2H1 R 000894H-00089FH Reserved - 0008A0H CAN1 - Interrupt Pending 1 Register Low INTPND1L1 INTPND11 R 0008A1H CAN1 - Interrupt Pending 1 Register High INTPND1H1 R 0008A2H CAN1 - Interrupt Pending 2 Register Low INTPND2L1 INTPND21 R 0008A3H CAN1 - Interrupt Pending 2 Register High INTPND2H1 R 0008A4H-0008AFH Reserved - 0008B0H CAN1 - Message Valid 1 Register Low MSGVAL1L1 MSGVAL11 R 0008B1H CAN1 - Message Valid 1 Register High MSGVAL1H1 R 0008B2H CAN1 - Message Valid 2 Register Low MSGVAL2L1 MSGVAL21 R 0008B3H CAN1 - Message Valid 2 Register High MSGVAL2H1 R 0008B4H-0008CDH Reserved - 0008CEH CAN1 - Output enable register COER1 R/W 0008CFH-0009FFH Reserved - 000A00H DMA - IO address block register 0 IOABK0 R/W 000A01H DMA - IO address block register 1 IOABK1 R/W 000A02H DMA - IO address block register 2 IOABK2 R/W 000A03H DMA - IO address block register 3 IOABK3 R/W 000A04H DMA - IO address block register 4 IOABK4 R/W 000A05H DMA - IO address block register 5 IOABK5 R/W 000A06H-000BFFH Reserved - Table 4: I/O map MB96(F)34x Address Register Abbreviation 8-bit access Abbreviation 16-bit access Access |
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