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5220-DS02-R 数据表(PDF) 64 Page - Broadcom Corporation. |
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5220-DS02-R 数据表(HTML) 64 Page - Broadcom Corporation. |
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64 / 90 page ![]() BCM5220 Preliminary Data Sheet 04/20/04 Broa d c om Co rp o r a t i o n Page 52 Auxiliary Multiple PHY Register Document 5220-DS04-405-R Restart Auto-Negotiation This self-clearing bit allows the auto-negotiation process to be restarted, regardless of the current status of the state machine. For this bit to work, auto-negotiation must be enabled. Writing a 1 to this bit restarts auto-negotiation. Since the bit is self-clearing, it always returns a 0 when read. The operation of this bit is identical to bit 9 of the Control register. Auto-Negotiation Complete This read-only bit returns a 1 after the auto-negotiation process has been completed. It remains 1 until the auto-negotiation process is restarted, a Link Fault occurs, or the chip is reset. If auto-negotiation is disabled or the process is still in progress, the bit returns a 0. Acknowledge Complete This read-only bit returns a 1 after the acknowledgment exchange portion of the auto-negotiation process has been completed and the Arbitrator state machine has exited the Complete Acknowledge state. It remains this value until the auto- negotiation process is restarted, a Link Fault occurs, auto-negotiation is disabled, or the BCM5220 is reset. Acknowledge Detected This read-only bit is set to 1 when the arbitrator state machine exits the acknowledged detect state. It remains high until the auto-negotiation process is restarted, or the BCM5220 is reset. Ability Detect This read-only bit returns a 1 when the auto-negotiation state machine is in the Ability Detect state. It enters this state a specified time period after the auto-negotiation process begins, and exits after the first FLP burst or link pulses are detected from the link partner. This bit returns a 0 any time the auto-negotiation state machine is not in the Ability Detect state. Super Isolate Writing a 1 to this bit places the BCM5201 into the Super Isolate mode. Additionally, all link pulses are suppressed. This allows the BCM5201 to coexist with another PHY on the same adapter card, with only one being activated at any time. 10BASE-T Serial Mode Writing a 1 to bit 1 of the Auxiliary Mode register enables the 10BASE-T Serial mode. In the special 10BASE-T Serial mode, data packets traverse to the MAC layer across only TXD0 and RXD0 at a rate of 10 MHz. Serial operation is not available in 100BASE-X mode. |
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