5220-DS02-R datasheet(15/90 Pages) BOARDCOM

15 / 90 page

Preliminary Data Sheet

BCM5220

04/20/04

Broa d c om Co rp o r a t i o n

Document

5220-DS04-405-R

Digital Adaptive Equalizer

Page 3

AUTO-NEGOTIATION

The BCM5220 contains the ability to negotiate its mode of operation over the twisted pair link using the auto-negotiation

mechanism defined in the IEEE 802.3u specification. Auto-negotiation can be enabled or disabled by hardware or software

control. When the auto-negotiation function is enabled, the BCM5220 automatically chooses its mode of operation by

advertising its abilities and comparing them with those received from its link partner.

The BCM5220 can be configured to advertise 100BASE-TX full-duplex and/or half-duplex and 10BASE-T full-and/or half-

duplex. The transceiver negotiates with its link partner and chooses the highest level of operation available for its own link.

Auto-negotiation is not operational during 100BASE-FX operation.

DIGITAL ADAPTIVE EQUALIZER

The digital adaptive equalizer removes Intersymbol Interference (ISI) created by the transmission channel media. The

equalizer accepts sampled unequalized data from the ADC on each channel and produces equalized data. The BCM5220

achieves an optimum signal-to-noise ratio by using a combination of feed forward equalization and decision feedback

equalization. This powerful technique achieves a 100BASE-TX BER of less than 1 x 10-12 for transmission up to 100 meters

on CAT 5 twisted pair cable, even in harsh noise environments. The digital adaptive equalizers in the BCM5220 achieve

performance close to theoretical limits. The all-digital nature of the design makes the performance very tolerant to on-chip

noise. The filter coefficients are self-adapting to any quality of cable or cable length. Due to transmit pre-equalization in

10BASE-T mode and complete lack of ISI in 100BASE-FX mode, the adaptive equalizer is bypassed in these two modes of

operation.

ADC

The receive channel has a 6-bit, 125-MHz analog-to-digital converter (ADC). The ADC samples the incoming data on the

receive channel and produces a 6-bit output. The output of the ADC is fed to the digital adaptive equalizer. Advanced analog

circuit techniques achieve low-offset, high-power-supply noise rejection, fast settling time, and low bit error rate.

DIGITAL CLOCK RECOVERY/GENERATOR

The all-digital clock recovery and generator block creates all internal transmit and receive clocks. The transmit clock is locked

to the 25-MHz clock input, while the receive clock is locked to the incoming data stream. Clock recovery circuits optimized

to MLT3, NRZI, and Manchester encoding schemes are included for use with each of the three different operating modes.

The input data stream is sampled by the recovered clock and fed synchronously to the digital adaptive equalizer.

5220-DS02-R 数据表(PDF) 15 Page - Broadcom Corporation.

5220-DS02-R 数据表(HTML) 15 Page - Broadcom Corporation.

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