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ADM1266ACPZ-R7 数据表(PDF) 15 Page - Analog Devices |
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ADM1266ACPZ-R7 数据表(HTML) 15 Page - Analog Devices |
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15 / 62 page ![]() Data Sheet ADM1266 Rev. A | Page 15 of 62 INPUTS Supply Fault Detectors The ADM1266 has 17 programmable supply fault detector (SFD) inputs. These dedicated inputs are labeled VHx (VH1 to VH4) and VPx (VP1 to VP13). The ADM1266 is also capable of making precision differential voltage measurements on the VPx pins (the exception is that VP13 cannot be used for differential measurements). One differential measurement requires two VPx pins. The odd numbered VPx pin (for example, VP1) must always be the greater voltage. The next corresponding even number VPx pin (for example, VP2) is used for that differential measure- ment. Both differential VPx pins must have the same input range selections. The SFD for the odd numbered VPx pin responds to the differential measurement. Figure 9 shows the arrangement of the pins. Each SFD input can be configured to detect an undervoltage (UV) fault (the input voltage drops below a preprogrammed value), or an overvoltage (OV) fault (the input voltage rises above a preprogrammed value). A programmable (up to 100 μs) glitch filter allows the user to remove any spurious transitions such as supply bounce at turn on. RANGE SELECT + – + – OV OUT GLITCH FILTER VHx UV OUT GLITCH FILTER FILTER SETTINGS RANGE SELECT + – + – OV OUT GLITCH FILTER VPx (ODD) UV OUT GLITCH FILTER FILTER SETTINGS RANGE SELECT + – + – OV OUT GLITCH FILTER VPx (EVEN) UV OUT GLITCH FILTER FILTER SETTINGS DIFFERENTIAL SELECTION VHx ADC INPUT + VPx ADC INPUT HIGH-Z HIGH-Z – + – VPx ADC INPUT OV DAC UV DAC OV DAC UV DAC OV DAC UV DAC Figure 9. Supply Fault Detectors The voltage range limits for threshold settings are • 0.4 V to 1.0 V • 0.75 V to 1.875 V • 1.5 V to 3.75 V • 2.0 V to 5.0 V (VPx pins only) • 3.0 V to 7.5 V (VHx pins only) • 6.0 V to 15.0 V (VHx pins only) When connecting directly to the voltage source, a 100 Ω resistor in series is recommended to avoid any latch-ups on the VHx and VPx pins. VH1 and VH2 are supply pins and do not need the 100 Ω resistor in series. Input Comparator Hysteresis The UV and OV comparators shown in Figure 9 are always monitoring and sensing the voltage on VHx and VPx. To avoid chatter (multiple transitions when the input is very close to the set threshold level), these comparators have digitally programmable hysteresis. The hysteresis is added after a supply voltage goes out of tolerance. Therefore, the user can program the amount above the UV threshold to which the input must rise before a UV fault is deasserted. Similarly, the user can program the amount below the OV threshold to which an input must fall before an OV fault is deasserted. Glitch Filter The ADM1266 has a dedicated digital glitch filter at the output of each comparator. For the fault to trigger, the comparator must remain set for the time greater than the programmed glitch filter time. This time can be programmed from 2 μs to 100 μs and is used for filtering any transient noises that may occur on the VHx and VPx pins. Using External Resistor Dividers External resistor dividers can be used to sense higher voltages or to achieve higher accuracy. When using an external resistor divider, select the 0.4 V to 1 V high impedance range on the VPx pins. It is recommended that the resistor divider be sized such that, under nominal conditions, there is 0.7 V at the VPx pins to provide the highest range for the OV and UV settings. The size of the external resistor divider can be input into the device using the VOUT_SCALE_MONITOR command (Register 0x2A). Warnings The UV and OV warnings are generated by comparing the VOUT_OV_WARN_LIMIT (Register 0x42) and (Register 0x43) VOUT_UV_WARN_LIMIT with the reading from the ADC. Because the ADC round robin time is 5 ms, the maximum delay from the warning occurring to the device detecting it is 5 ms. Warnings are not sent to the sequence engine and cannot be used to trigger events in the state machine. Instead, the warnings are sent to the logic block and can be used to assert/deassert PDIOs and GPIOs. |
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