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ADM1266ACPZ-R7 数据表(PDF) 21 Page - Analog Devices

部件名 ADM1266ACPZ-R7
功能描述  Cascadable Super Sequencer Margin Control and Fault Recording
PDF  62 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADM1266ACPZ-R7 数据表(HTML) 21 Page - Analog Devices

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Data Sheet
ADM1266
Rev. A | Page 21 of 62
VOUT_COMMAND
VOUT_MARGIN_HIGH
VOUT_MARGIN_LOW
DAC ENABLE
OPERATION COMMAND
REG 0x01[7:6] = 00
OPERATION COMMAND
REG 0x01[7:6] = 10
REG 0x01[5:4] = 10
Figure 13. Margining Example 1
VOUT_COMMAND
VOUT_MARGIN_HIGH
VOUT_MARGIN_LOW
DAC ENABLE
MARGIN LOW
TO
MARGIN OFF
MARGIN OFF
TO
MARGIN HIGH
MARGIN HIGH
TO
MARGIN VOUT
TRANSITION
SPEED
TRANSITION
SPEED
TRANSITION
SPEED
Figure 14. Margining Example 2
Figure 13 and Figure 14 show examples of margining. When
margining is turned off, the DAC returns the output voltage to
the nominal level at the transition rate (0xDB) and then enters a
high-Z state.
To enable a smooth start of the margining process, the
ADM1266 uses a smart connect mode. Smart connect mode
calculates the DAC code that is equal to the feedback node such
that there is no current flowing in Resistor R3 (see Figure 12).
Smart connect mode prevents any sudden glitches in the output
voltage. Following smart connect mode, the DAC code is
changed as per the margin command.
The closed-loop margining process differs from open-loop
margining with the following differences:
The DAC is continuously repositioned until the 16 averages of
the high accuracy ADC monitoring the output rail result in
a value that equals the VOUT_MARGIN_x command.
This repositioning ensures that the output voltage does
indeed reach the command value. The output voltage is
sampled using the ADC at a rate of 5 ms. Therefore,
16 average readings complete in approximately 80 ms.
Whenever a margin command is issued, the DAC changes
its output based on the rate programmed in Register 0xDB.
Therefore, the output of the power supply rail also transitions
at this rate. All the DACs are controlled using the same rate.
During the closed-loop margining process, the UV and OV
faults are active and take the appropriate programmed action.
The DAC is disabled (high-Z state) immediately and does not
perform a soft disconnect.
One Shot Mode and Continuous Mode
The ADM1266 offers two modes of operation in closed-loop
margining: one shot and continuous mode.
In one shot mode, the process of closed-loop margining (see the
Closed-Loop Margining section) occurs once, that is, the DAC
changes the output voltage as per the margin command and
remains fixed, and no further changes in the DAC output are
allowed. In continuous mode, this process occurs continuously.
In one shot mode, a new margin command must be issued to
change the DAC output.
Continuous mode can be used for increasing the accuracy of a
power supply that suffers from wide tolerances in component or
reference voltage levels. Use this method when the ADC accuracy
is greater than the accuracy of the external components.
The Power Studio software provides all the extensive configura-
tions, from selecting the DAC range to margining commands.
Closed-Loop Margining Enable Timings
If the rail is in steady state and the ADM1266 receives the
operation command to go from the margin being off to the
servo VOUT_COMMAND (margin high or margin low), the
ADM1266 enables closed-loop margining. The ADM1266 also
performs the smart connection, waiting 5 ms for an updated
ADC reading before starting the ramp to obtain the desired
voltage level.
If the rail is in a steady state and the ADM1266 receives the
operation command to go from the servo VOUT_COMMAND
to margin high (margin low or margin off), the ADM1266
immediately starts the ramp to obtain the desired voltage level.
This process is also true when the starting point is margin high
or margin low.
If the device is programmed to wake up and immediately start
to the servo VOUT_COMMAND (margin high or margin low),
the ADM1266 enables the rail. After the rail clears the UV
threshold, the ADM1266 enables closed-loop margining and
performs smart connect after 20 ms to 25 ms. Then, the
ADM1266 waits 5 ms to obtain an updated ADC reading and
starts the ramp to obtain the desired voltage level.



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