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WM8802SCFV 数据表(PDF) 59 Page - Wolfson Microelectronics plc |
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WM8802SCFV 数据表(HTML) 59 Page - Wolfson Microelectronics plc |
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59 / 65 page  Product Preview WM8802 w PP Rev 1.1 April 2004 59 READ REGISTER OUTPUT CONTENTS REGISTER ADDRESS DO15 DO14 DO13 DO12 DO11 DO10 DO9 DO8 CCB address: 0xEB FSDAT7 FSDAT6 FSDAT5 FSDAT4 FSDAT3 FSDAT2 FSDAT1 FSDAT0 FSDAT [7:0] fs counter data output • FSDAT [7:0] is the fs calculation counter value. The data length is 8 bits, FSDAT0 is LSB and FSDAT7 is MSB. • The relation between the count value and fs is expressed by the following equation. fs = 6144/FSDAT (kHz) • fs calculation is performed using a 6.144MHz clock so the calculation accuracy is determined by this clock. • The calculation counter value is 8 bit output so the fs that can be calculated is higher than 24kHz. READ REGISTER 3 (FIRST 48 CHANNEL STATUS BITS) • The first 48 channel status bits can be read with the demodulation function. • The read channel status data is a LSB output. • For read, CCB address is set to 0xEC. • The channel status data cannot be updated after the CCB address is set. • The relation between the read registers and the channel status data is shown below. REGISTER BIT NO. CONTENTS REGISTER BIT NO. CONTENTS DO0 Bit 0 Application DO24 Bit 24 Sampling frequency DO1 Bit 1 Control DO25 Bit 25 DO2 Bit 2 DO26 Bit 26 DO3 Bit 3 DO27 Bit 27 DO4 Bit 4 DO28 Bit 28 Clock accuracy DO5 Bit 5 DO29 Bit 29 DO6 Bit 6 Not defined DO30 Bit 30 Not defined DO7 Bit 7 DO31 Bit 31 DO8 Bit 8 Category code DO32 Bit 32 Word length DO9 Bit 9 DO33 Bit 33 DO10 Bit 10 DO34 Bit 34 DO11 Bit 11 DO35 Bit 35 DO12 Bit 12 DO36 Bit 36 Not defined DO13 Bit 13 DO37 Bit 37 DO14 Bit 14 DO38 Bit 38 DO15 Bit 15 DO39 Bit 39 DO16 Bit 16 Source number DO40 Bit 40 DO17 Bit 17 DO41 Bit 41 DO18 Bit 18 DO42 Bit 42 DO19 Bit 19 DO43 Bit 43 DO20 Bit 20 Channel number DO44 Bit 44 DO21 Bit 21 DO45 Bit 45 DO22 Bit 22 DO46 Bit 46 DO23 Bit 23 DO47 Bit 47 |
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