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WM8802SCFV 数据表(PDF) 29 Page - Wolfson Microelectronics plc |
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WM8802SCFV 数据表(HTML) 29 Page - Wolfson Microelectronics plc |
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29 / 65 page ![]() Product Preview WM8802 w PP Rev 1.1 April 2004 29 DATA PLL LOCK ERROR INPUT PARITY ERROR (A) INPUT PARITY ERROR (B) INPUT PARITY ERROR (C) RDATA output Low Low Previous value data Output fs calculation result Low Output Output Output Channel status Low Low Previous value data Previous value data Validity flag Low Low Output Output User data Low Low Output Output Table 11 Data Processing upon Error Occurrence Notes: 1. Input parity error (A): Occurs 9 or more times in succession 2. Input parity error (B): Occurs 8 or fewer times in succession, in case of audio data 3. Input parity error (C): Occurs 8 or fewer times in succession, in case of non-PCM burst data Figure 20 shows an example of data processing upon occurrence of a parity error. RERR RDATA R-ch Previous data value Input Data RLRCK An error occurs a single time Muted after 9 or more consecutive errors L-ch R-ch …. Previous data value R-2 L-2 R-0 L-1 R-0 L-0 L-2 R-2 L-2 R-2 L-2 R-2 L-2 R-2 L-4 R-3 L-3 R-2 L-2 R-1 R-4 L-5 R-5 L-6 R-6 L-7 R-7 L-8 R-8 L-1 Figure 20 Data Processing Upon Parity Error Occurrence PROCESSING DURING ERROR RECOVERY PLL becomes locked and data demodulation begins when preambles B, M and W are detected. RDATA output data is output from the RLRCK edge after RERR goes Low. |
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