WM8802SCFV datasheet(13/65 Pages) WOLFSON

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WM8802

PP Rev 1.1 April 2004

DESCRIPTION OF DEMODULATION FUNCTION

The demodulation function operation settings are performed using RXOPR.

CLOCKS

PLL (LPF)

The VCO (Voltage Controlled Oscillator) can be stopped if PLLOPR is set. Synchronization to

frequencies from 32kHz to 192kHz and RMCK of 4MHz to 25MHz can be selected.

The PLL clock frequency is selected with PLLSEL. For systems with an input data sampling

frequency of 105kHz or lower, the initial setting of 512fs is recommended. Since the system clock

RMCK output initial value is set to 1/2 of PLLSEL, the RMCK output is 256fs when a PLL clock

frequency of 512fs is used.

For systems with an input data sampling frequency higher than 105kHz, the PLL clock frequency

should be set to 256fs. RMCK will be 128fs if PRSEL0 is set to 1 and the same initial output setting

(i.e. 256fs) is used,

LPF is a PLL loop filter pin. Resistances and capacitances should be selected in accordance with

the frequency of the PLLSEL system clock. The PLLSEL setting should be set prior to bi-phase data

input since PLLSEL switching involves a change in LPF loop filter constant.

LPF

Figure 5 Loop Filter Configuration

PLLCK1

PLLCK0

150Ω

0.047µF

0.0068µF

220Ω

0.068µF

0.0047µF

Table 6 Loop Filter Component Values

WM8802SCFV 数据表(PDF) 13 Page - Wolfson Microelectronics plc