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LSM6DSR 数据表(PDF) 49 Page - STMicroelectronics |
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LSM6DSR 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 168 page  9.12 INT1_CTRL (0Dh) INT1 pin control register (r/w) Each bit in this register enables a signal to be carried over INT1 when the MIPI I3CSM dynamic address is not assigned (I²C or SPI is used). Some bits can be also used to trigger an IBI (In-Band Interrupt) when the MIPI I3CSM interface is used.. The output of the pad will be the OR combination of the signals selected here and in register MD1_CFG (5Eh). Table 43. INT1_CTRL register DEN_DRDY _flag INT1_ CNT_BDR INT1_ FIFO_FULL INT1_ FIFO_OVR INT1_ FIFO_TH INT1_ BOOT INT1_ DRDY_G INT1_ DRDY_XL Table 44. INT1_CTRL register description DEN_DRDY_flag Sends DEN_DRDY (DEN stamped on Sensor Data flag) to INT1 pin. INT1_CNT_BDR Enables COUNTER_BDR_IA interrupt on INT1. INT1_FIFO_FULL Enables FIFO full flag interrupt on INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. INT1_FIFO_OVR Enables FIFO overrun interrupt on INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. INT1_FIFO_TH Enables FIFO threshold interrupt on INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. INT1_BOOT Enables boot status on INT1 pin. INT1_DRDY_G Enables gyroscope data-ready interrupt on INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. INT1_DRDY_XL Enables accelerometer data-ready interrupt on INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. LSM6DSR INT1_CTRL (0Dh) DS11976 - Rev 2 page 49/168 |
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