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LSM6DSR 数据表(PDF) 18 Page - STMicroelectronics

部件名 LSM6DSR
功能描述  iNEMO inertial module: always-on 3D accelerometer and 3D gyroscope
PDF  168 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

LSM6DSR 数据表(HTML) 18 Page - STMicroelectronics

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Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number of bytes transferred
per transfer is unlimited. Data is transferred with the Most Significant bit (MSb) first. If a slave receiver doesn’t
acknowledge the slave address (i.e. it is not able to receive because it is performing some real-time function) the
data line must be left HIGH by the slave. The master can then abort the transfer. A LOW to HIGH transition on the
SDA line while the SCL line is HIGH is defined as a STOP condition. Each data transfer must be terminated by
the generation of a STOP (SP) condition.
In the presented communication format MAK is master acknowledge and NMAK is no master acknowledge.
LSM6DSR
I²C/SPI interface
DS11976 - Rev 2
page 18/168



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