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LSM6DSR 数据表(PDF) 95 Page - STMicroelectronics |
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LSM6DSR 数据表(HTML) 95 Page - STMicroelectronics |
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95 / 168 page ![]() 11.7 EMB_FUNC_INT1 (0Ah) INT1 pin control register (r/w) Each bit in this register enables a signal to be carried over INT1. The pin's output will supply the OR combination of the selected signals. Table 190. EMB_FUNC_INT1 register INT1_ FSM_LC 0(1) INT1_ SIG_MOT INT1_TILT INT1_STEP_ DETECTOR 0(1) 0(1) 0(1) 1. This bit must be set to '0' for the correct operation of the device. Table 191. EMB_FUNC_INT1 register description INT1_FSM_LC(1) Routing of FSM long counter timeout interrupt event on INT1. Default value: 0 (0: routing on INT1 disabled; 1: routing on INT1 enabled) INT1_SIG_MOT(1) Routing of significant motion event on INT1. Default value: 0 (0: routing on INT1 disabled; 1: routing on INT1 enabled) INT1_TILT(1) Routing of tilt event on INT1. Default value: 0 (0: routing on INT1 disabled; 1: routing on INT1 enabled) INT1_STEP_DETECTOR(1) Routing of pedometer step recognition event on INT1. Default value: 0 (0: routing on INT1 disabled; 1: routing on INT1 enabled) 1. This bit is effective if the INT1_EMB_FUNC bit of MD1_CFG (5Eh) is set to 1. LSM6DSR EMB_FUNC_INT1 (0Ah) DS11976 - Rev 2 page 95/168 |
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