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XIO2000AI 数据表(PDF) 46 Page - Texas Instruments

部件名 XIO2000AI
功能描述  XIO2000A/XIO2000AI PCI Express to PCI Bus Translation Bridge
PDF  165 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

XIO2000AI 数据表(HTML) 46 Page - Texas Instruments

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Feature/Protocol Descriptions
37
April 2007 Revised October 2008
SCPS155C
Bridge
REQ
REQ0
REQ1
REQ2
Bridge
GNT
GNT0
GNT1
GNT2
Isoc Ref
Clock
Port Arb
Table
PCI Bus
33
000
2
22
21
111
3
3
3
000
2
222
1
Bridge
Device 1‡
Device 0
Device 2
Bridge
Device 1
Figure 3−5. PCI Bus Timing
3.6
Configuration Register Translation
PCI Express configuration register transactions received by the bridge are decoded based on the transaction’s
destination ID. These configuration transactions can be broken into three subcategories: type 0 transactions,
type 1 transactions that target the secondary bus, and type 1 transactions that target a downstream bus other
than the secondary bus.
PCI Express type 0 configuration register transactions always target the configuration space and are never
passed on to the secondary interface.
Type 1 configuration register transactions that target a device on the secondary bus are converted to type 0
configuration register transactions on the PCI bus. Figure 3−6 shows the address phase of a type 0
configuration transaction on the PCI bus as defined by the PCI specification.
31
16
15
11
10
8
7
2
1
0
IDSEL
Reserved
Function
Number
Register Number
0
0
Figure 3−6. Type 0 Configuration Transaction Address Phase Encoding



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