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XIO2000AI 数据表(PDF) 65 Page - Texas Instruments |
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XIO2000AI 数据表(HTML) 65 Page - Texas Instruments |
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65 / 165 page  Classic PCI Configuration Space 56 April 2007 Revised October 2008 SCPS155C 4.16 I/O Limit Register This read/write register specifies the upper limit of the I/O addresses that the bridge forwards downstream. See Table 4−7 for a complete description of the register contents. PCI register offset: 1Dh Register type: Read-only, Read/Write Default value: 01h BIT NUMBER 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 1 Table 4−7. I/O Limit Register Description BIT FIELD NAME ACCESS DESCRIPTION 7:4 IOLIMIT RW I/O limit. Defines the top address of the I/O address range that determines when to forward I/O transactions from one interface to the other. These bits correspond to address bits [15:12] in the I/O address. The lower 12 bits are assumed to be FFFh. The 16 bits corresponding to address bits [31:16] of the I/O address are defined in the I/O limit upper 16 bits register (offset 32h, see Section 4.25). 3:0 IOTYPE R I/O type. This field is read-only 1h indicating that the bridge supports 32-bit I/O addressing. |
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