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XIO2000AI 数据表(PDF) 12 Page - Texas Instruments

部件名 XIO2000AI
功能描述  XIO2000A/XIO2000AI PCI Express to PCI Bus Translation Bridge
PDF  165 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

XIO2000AI 数据表(HTML) 12 Page - Texas Instruments

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Introduction
3
April 2007 Revised October 2008
SCPS155C
2.4
Document Conventions
Throughout this data manual, several conventions are used to convey information. These conventions are
listed below:
1.
To identify a binary number or field, a lower case b follows the numbers. For example: 000b is a 3-bit binary
field.
2.
To identify a hexadecimal number or field, a lower case h follows the numbers. For example: 8AFh is a
12-bit hexadecimal field.
3.
All other numbers that appear in this document that do not have either a b or h following the number are
assumed to be decimal format.
4.
If the signal or terminal name has a bar above the name (for example, GRST), then this indicates the
logical NOT function. When asserted, this signal is a logic low, 0, or 0b.
5.
Differential signal names end with P, N, +, or − designators. The P or + designators signify the positive
signal associated with the differential pair. The N or − designators signify the negative signal associated
with the differential pair.
6.
RSVD indicates that the referenced item is reserved.
7.
The power and ground signals in Figure 2−1 are not subscripted to aid in readability.
8.
In Sections 4 through 6, the configuration space for the bridge is defined. For each register bit, the software
access method is identified in an access column. The legend for this access column includes the following
entries:
r – read access by software
u – updates by the bridge internal hardware
w – write access by software
c – clear an asserted status bit with a write-back of 1b by software
2.5
Document History
REVISION
DATE
REVISION
NUMBER
REVISION COMMENTS
05/2004
Product preview
08/2005
A
Initial release
2.6
Ordering Information
ORDERING NUMBER
NAME
VOLTAGE
PACKAGE
XIO2000A
PCI-Express to PCI Bridge
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V and 1.5-V power terminals
201-terminal GZZ MicroStar
PBGA
XIO2000A
PCI-Express to PCI Bridge
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V and 1.5-V power terminals
201-terminal ZZZ (Lead-Free)
MicroStar PBGA
XIO2000A
PCI-Express to PCI Bridge
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V and 1.5-V power terminals
175-terminal ZHH (Lead-Free)
MicroStar PBGA
XIO2000A
PCI-Express to PCI Bridge
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V and 1.5-V power terminals
175-terminal ZHC (Lead-Free)
MicroStar PBGA
XIO2000AI
PCI-Express to PCI Bridge
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V and 1.5-V power terminals
201-terminal ZZZ (Lead-Free)
MicroStar PBGA
XIO2000AI
PCI-Express to PCI Bridge
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V and 1.5-V power terminals
175-terminal ZHH (Lead-Free)
MicroStar PBGA
XIO2000AI
PCI-Express to PCI Bridge
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V and 1.5-V power terminals
175-terminal ZHC (Lead-Free)
MicroStar PBGA



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