VG6640 datasheet(112/126 Pages) STMICROELECTRONICS

112 / 126 page

Application

VG6640, VD6640

112/126

DocID023597 Rev 11

11.6

External sync input

The image sensor can accept an external synchronization (sync) input from either an I2C

signal or an external signal.

For an external signal (FSYNC_IN), the synchronization occurs on the rising edge of the

signal only.

The image sensor measures the delay between the external sync signal and the internal

frame start and records the value in a status register. Re-synchronizing the frame will not

cause corruption to the current image streaming. If the initial sync signal occurs during the

active part of a frame, the sensor will complete the current frame, then output the next frame

as soon as possible (i.e. with minimum frame blanking). In that way, the output frames will

synchronize with the frame sync signal after several frames have been streamed and with

no loss or corruption of frames.

The image sensor also provides a frame synchronization output (FSYNC_OUT) that

provides a rising edge when integration of the frame starts.

11.7

Error correcting code (ECC) output

Error correcting code (ECC) checking is provided on the MCU SRAM memories.

If a single bit error occurs, the error is corrected. In this case, a flag is set and a counter is

incremented in the registers and status line.

If double bit error occurs, it cannot be corrected. In this case, a flag is set and the ECC_OUT

signal is latched and will remain HI. Normally the companion device would reset the image

sensor in this case, since the internal firmware of the sensor may be corrupted.

VG6640 数据表(PDF) 112 Page - STMicroelectronics