VG6640 datasheet(124/126 Pages) STMICROELECTRONICS

124 / 126 page

Revision history

VG6640, VD6640

124/126

DocID023597 Rev 11

14-Dec-2015

Improved consistency of bit field representation in

Naming of some registers and bit fields to match User

Manual usage.

Note about external clock rate needed for 1MHz SCL.

Removed corrupt frame masking registers.

Test pattern generator section re-written.

Electrical characteristics section updated with latest test

results.

Removed Cut1.0 register “Dgain_Legacy”

11-May-2016

Figure 31 - Changed I2C pull-ups from 2V8 to 1V8.

Removed “exposure” from section name 3.2.1.

Replaced “Marking information” diagram.

Added Automotive” to document title.

Changed name of section “Mechanical” to “Package

information”

I2C pulse width suppression (tSP) max set to 50ns.

I2C hold time (tHD.DAT) minimum set to 16ns.

Modifications to Figures 32 to 35: added “in MIPI CSI-2

mode” to title; modified state names to match state

diagram in Section 3; LP11 state extended to all of

standby period in power down diagrams.

Correction to Section 3.3.3. to mention LP11 state in

Standby state.

Added footnote to Table 42 about VANA current in

standby state when CSI-2 interface used.

Table 46 - removed classification, added tbc to

frequency limits.

Added into Section 11.4.2. a note to saying to contact

ST support for further information.

Section 7.3.3 changed lower limit of digital gains to zero.

Table 65. Document revision history (continued)

Date

Revision

Changes

VG6640 数据表(PDF) 124 Page - STMicroelectronics

VG6640 数据表(HTML) 124 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载