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ADAV803ASTZ 数据表(PDF) 53 Page - Analog Devices |
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ADAV803ASTZ 数据表(HTML) 53 Page - Analog Devices |
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53 / 56 page ![]() ADAV803 Rev. 0 | Page 53 of 56 Table 79. ALC Control Register 1 FSSEL1–0 GAINCNTR1–0 RECMODE1–0 LIMDET ALCEN 7, 6 5, 4 3, 2 1 0 ADDRESS = 1111011 (0x7B) FSSEL1–0 These bits should equal the sample rate of the ADC. 00 = 96 kHz. 01 = 48 kHz. 10 = 32 kHz. 11 = Reserved. GAINCNTR1–0 These bits determine the limit of the counter used in limited recovery mode. 00 = 3. 01 = 7. 10 = 15. 11 = 31. RECMODE1–0 These bits determine which recovery mode is used by the ALC section. 00 = No recovery. 01 = Normal recovery. 10 = Limited recovery. 11 = Reserved. LIMDET These bits limit detect mode. 0 = ALC is used when either channel exceeds the set limit. 1 = ALC is used only when both channels exceed the set limit. ALCEN These bits enable ALC. 0 = Disable ALC. 1 = Enable ALC. Table 80. ALC Control Register 2 RES RECTH1–0 ATKTH1–0 RECTIME1–0 ATKTIME 7 6, 5 4, 3 2, 1 0 ADDRESS = 1111100 (0x7C) RECTH1–0 Recovery threshold. 00 = −2 dB. 01 = −3 dB. 10 = −4 dB. 11 = −6 dB. ATKTH1–0 Attack threshold. 00 = 0 dB. 01 = −1 dB. 10 = −2 dB. 11 = −4 dB. RECTIME1–0 Recovery time selection. 00 = 32 ms. 01 = 64 ms. 10 = 128 ms. 11 = 256 ms. ATKTIME Attack timer selection. 0 = 1 ms. 1 = 4 ms. |
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