MCP48FVB08 datasheet(61/112 Pages) MICROCHIP

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DS20006362A-page 61

MCP48FXBX4/8

Control and System Status register. Each DAC has one

bit to control the gain of the DAC and three status bits.

GAIN CONTROL AND SYSTEM STATUS REGISTER (ADDRESS 0Ah; VOLATILE)

R/W-n R/W-n R/W-n R/W-n R/W-n R/W-n R/W-n R/W-n R/C-1

R-0

U-0

Octal

POR EEWA

—

Quad

—(1)

POR EEWA

—

bit 15

bit 0

Legend:

R = Readable bit

W = Writable bit

C = Clearable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

= Quad-channel device

= Octal-channel device

Octal

Quad

—

bit 15-12 Unimplemented: Read as ‘0’

bit 15-8

bit 11-8

Gn: DAC Channel n Output Driver Gain Control

1 = 2x gain

0 = 1x gain

bit 7

POR: Power-on Reset (Brown-out Reset) Status bit

This bit indicates if a POR or BOR event has occurred since the last READ command of this

1 = A POR (BOR) event has occurred since the last read of this register; reading this register

clears this bit

0 = A POR (BOR) event has not occurred since the last read of this register

bit 6

EEWA: EEPROM Write Active Status

This bit indicates if the EEPROM write cycle is occurring.

1 = An EEPROM write cycle is currently occurring; only serial commands to the volatile mem-

ory are allowed

0 = An EEPROM write cycle is NOT currently occurring

bit 5-0

Unimplemented: Read as ‘0’

Note 1:

Unimplemented bit, read as ‘0’.

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