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MCP48FVB08 数据表(PDF) 63 Page - Microchip Technology

部件名 MCP48FVB08
功能描述  8/10/12-Bit Quad/Octal Voltage Output, 6 LSb INL Digital-to-Analog Converters with SPI Interface
PDF  112 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP48FVB08 数据表(HTML) 63 Page - Microchip Technology

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 2020 Microchip Technology Inc.
DS20006362A-page 63
MCP48FXBX4/8
Register 4-6 shows the format of the DAC WiperLock
Technology Status register.
REGISTER 4-6:
DAC WiperLock™ TECHNOLOGY STATUS REGISTER (ADDRESS 0Bh; VOLATILE)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
R-0(1)
Octal
WL7B WL7A WL6B WL6A WL5B WL5A WL4B WL4A WL3B WL3A WL2B WL2A WL1B WL1A WL0B WL0A
Quad
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
WL3B WL3A WL2B WL2A WL1B WL1A WL0B WL0A
bit 15
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
= Quad-channel device
= Octal-channel device
Octal
Quad
—
bit 15-8
Unimplemented: Read as ‘0’
bit 15-0
bit 7-0
WLnB:WLnA: WiperLock™ Technology Status
These bits reflect the state of the DLn:CLn nonvolatile Configuration bits.
11 = DAC Wiper and DAC Configuration (volatile and nonvolatile registers) are locked
(DLn = CLn = Enabled)
10 = DAC Wiper (volatile and nonvolatile) and DAC Configuration (nonvolatile registers) are
locked (DLn = Enabled; CLn = Disabled)
01 = DAC Wiper (nonvolatile) and DAC Configuration (nonvolatile registers) are locked
(DLn = Disabled; CLn = Enabled)
00 = DAC Wiper and DAC Configuration are unlocked (DLn = CLn = Disabled)
Note 1:
POR value depends on the programmed values of the DLn:CLn Configuration bits. The devices are
shipped with a default DLn:CLn Configuration bit state of ‘0’.
2:
Unimplemented bit, read as ‘0’.



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