MCP48FVB08 datasheet(83/112 Pages) MICROCHIP

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DS20006362A-page 83

MCP48FXBX4/8

7.8

READ Command

(Normal and High Voltage)

The READ command is a 24-bit command and is used

to transfer data from the specified memory location to

the host controller. The READ command can be issued

to both the volatile and nonvolatile memory locations.

The format of the command, as well as an example of

SDI and SDO data, are shown in Figure 7-7.

The first seven bits of the READ command determine

the address and the command. The 8th clock will out-

put the CMDERR bit on the SDO pin. By means of the

remaining 16 clocks, the device will transmit the data

bits of the specified address (AD4:AD0).

During an EEPROM write cycle (write to nonvolatile

memory location or enable/disable Configuration bit

command), the READ command can only read the

volatile memory locations. By reading the Status

the write cycle has been completed (via the state of the

EEWA bit).

The READ command formats include:

• Single Read

• Continuous Reads

7.8.1

LAT PIN INTERACTION

During a READ command of the DACn registers, if the

LAT pin transitions from VIH to VIL, then the read data

may be corrupted. This is due to the fact that the data

being read are the output value and not the DAC

of the output value. Based on the DAC output value,

the DACn register value and the Command bit where

the LAT pin transitions, the value being read could be

corrupted.

If LAT pin transitions occur during a read of the DACn

performed until the two most recent read values match.

Then the most recent read data are good.

7.8.2

SINGLE READ

The READ command operation requires that the

CS pin be in the Active state (VIL). Typically, the CS

pin will be in the Inactive state (VIH) and is driven to

the Active state (VIL). The 24-bit READ command

(command byte and data byte) is then clocked in on

the SCK and SDI pins. The SDO pin starts driving data

on the 8th bit (CMDERR bit) and the addressed data

come out on the 9th through 24th clocks.

FIGURE 7-7:

READ Command – SDI and SDO States.

Note 1: During device communication, if an unim-

plemented address is specified, then the

MCP48FXBX4/8 will command error that

byte. To reset the SPI state machine, the

CS pin must be driven to the VIH state.

2: If the LAT pin is high (VIH), reads of the

volatile DAC register read the output

value, not the internal register.

3: The READ commands operate the same

regardless of the state of the High-Voltage

Command (HVC) signal.

12-bit data

10-bit data

8-bit data

SDI

SDO

dd Valid(1)

0 Invalid(2)

Note 1: The Data bits depend on the resolution of the device: 12-bit = D11:D00, 10-bit = D09:D00, and

8-bit = D07:D00. The unimplemented bits are output as ‘0’ and data are right justified for easy host

controller operation (no data manipulation after reading the register value).

2: If an error condition occurs (CMDERR = 0), all the following SDO bits will be output as ‘0’ until the

CMDERR condition is cleared (the CS pin is forced to the Inactive state).

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