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MCP48FVB08 数据表(PDF) 85 Page - Microchip Technology |
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MCP48FVB08 数据表(HTML) 85 Page - Microchip Technology |
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85 / 112 page  2020 Microchip Technology Inc. DS20006362A-page 85 MCP48FXBX4/8 FIGURE 7-9: 24-Bit READ Command (C1:C0 = 11) – SPI Waveforms (Mode 1,1). FIGURE 7-10: 24-Bit READ Command (C1:C0 = 11) – SPI Waveforms (Mode 0,0). AD2 AD1 AD4 AD3 C0 X AD0 C1 D15 D14 23 22 21 20 09 08 07 06 03 01 02 00 05 D03 D02 D01 D00 CMDERR CS SCK SDO SDI 04 Sample Input VIH VIL VIH VIHH HVC(1) Note: HVC must be at VIHH before the start of a WRITE command and only lowered to VIH or VIL after the last bit of the 24-bit command. Note 1: If the state of the HVC pin is VIHH, then the command is ignored, but a Command Error condition (CMDERR) will NOT be generated. AD2 AD1 AD4 AD3 C0 X AD0 C1 D15 D14 23 22 21 20 09 08 07 06 03 01 02 00 05 D03 D02 D01 D00 CS SCK SDO SDI 04 Sample Input VIH VIL 19 CMDERR VIH VIHH HVC(1) Note: HVC must be at VIHH before start of a WRITE command and only lowered to VIH or VIL after the last bit of the 24-bit command. Note 1: If the state of the HVC pin is VIHH, then the command is ignored, but a Command Error condition (CMDERR) will NOT be generated. |
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